Peter Asbeck

High Efficiency Mm-Wave Power Amplifiers for 5G

Currently there is vigorous competition among device technologies and circuits approaches to achieve acceptable efficiency at 5G mmwave carrier frequencies with representative 800-2000MHz bandwidths, peak-to-average power ratios of 7-10dB and complex signal constellations (64QAM OFDM).  After a discussion of device technology considerations, this presentation focuses on design techniques and experimental results for 45nm CMOS SOI technology.  Transistor stacking is used to increase overall output power and decrease impedance matching losses. Doherty power amplifiers at 28GHz are reported that achieve peak power levels of 22dBm and up to 28% PAE at 6dB backoff.  Linearity is adequate for 64QAM OFDM without use of DPD. Approaches to achieve higher output power levels in CMOS are also discussed.

Peter Asbeck is a Professor in the Department of Electrical and Computer Engineering at the University of California, San Diego, and member of UCSD’s Center for Wireless Communications.  His research centers on high performance transistor technologies and their application to wireless power amplifiers.  He attended MIT, where he received the B.S. and Ph.D. degrees in 1969 and in 1975.  From 1978 to 1991, he was with Rockwell International Science Center, where he was involved in the development of high speed devices and circuits using III-V compounds and heterojunctions.  Dr. Asbeck is a member of the U.S. National Academy of Engineering, and has been a Distinguished Lecturer of the IEEE Electron Device Society, and of the Microwave Theory and Techniques Society.  He received the 2003 IEEE David Sarnoff Award for his work on heterojunction bipolar transistors, and the 2012 IEEE MTT Distinguished Educator Award.